Introduction
Clock edges have timing uncertainty, typically called jitter, which degrades the noise performance of the ADC.
Reference
- https://www.youtube.com/watch?v=z_23tV1Ek0E
- chrome-extension://efaidnbmnnnibpcajpcglclefindmkaj/https://www.ti.com/content/dam/videos/external-videos/en-us/2/3816841626001/5529003238001.mp4/subassets/TIPL-4704-Jitter-vs-SNR.pdf